java.lang.Object
- org.deepjava.runtime.mpc555.driver.QSMCM

All Implemented Interfaces:

Impc555, IntbMpc555HB, Ippc32
```
public class QSMCM
extends Object
implements IntbMpc555HB
```
Definitions for QSMCM

Field Summary

Fields
Modifier and Type	Field	Description
`static int`	`sc1srFE`	Framing Error. 0 No framing error on the received data 1 Framing error or break ocured on the received data
`static int`	`sc1srIDLE`	Idle-Line detected.
`static int`	`sc1srNF`	Noise Error Flag. 0 No noise detectedon the received data 1 Noise ocured on the received data
`static int`	`sc1srOR`	Overrun Error.
`static int`	`sc1srPF`	Parity Error.
`static int`	`sc1srRAF`	Receiver Active. 0 SCI receiver is idle 1 SCI receiver is busy
`static int`	`sc1srRDRF`	Receiver Data Register Full.
`static int`	`sc1srTC`	Transmit Complete. 0 SCI transmitter is busy 1 SCI transmitter is idle
`static int`	`sc1srTDRE`	Transmit Data Register Empty. 0 Register TDR still contains data to be sent to the transmit serial shifter 1 A new character can now be written to register TDR
`static int`	`sc2srFE`	Framing Error. 0 No framing error on the received data 1 Framing error or break ocured on the received data
`static int`	`sc2srIDLE`	Idle-Line detected.
`static int`	`sc2srNF`	Noise Error Flag. 0 No noise detectedon the received data 1 Noise ocured on the received data
`static int`	`sc2srOR`	Overrun Error. 0 RDRF is cleare before new data arrives 1 RDRF is not cleare before new data arrives
`static int`	`sc2srPF`	Parity Error.
`static int`	`sc2srRAF`	Receiver Active. 0 SCI receiver is idle 1 SCI receiver is busy
`static int`	`sc2srRDRF`	Receiver Data Register Full. 0 Register RDR is empty or contains previously read data 1 Register RDR contains new data
`static int`	`sc2srTC`	Transmit Complete. 0 SCI transmitter is busy 1 SCI transmitter is idle
`static int`	`sc2srTDRE`	Transmit Data Register Empty. 0 Register TDR still contains data to be sent to the transmit serial shifter 1 A new character can now be written to register TDR
`static int`	`scc1r1ILT`	Idle-Line Detect Type. 0 Short idle-line detect (start count on first one) 1 Long idle-line detect (start count on first one after stop bit(s))
`static int`	`scc1r1LOOPS`	Loop Mode. 0 normal SCI operation, no looping, feedback path disabled 1 Test SCI operation, looping, feedback path enabled
`static int`	`scc1r1M`	Mode Select.
`static int`	`scc1r1PE`	Parity Enable. 0 SCI parity disabled 1 SCI parity enabled
`static int`	`scc1r1PT`	Parity Type.
`static int`	`scc1r1RE`	Receiver Enable. 0 SCI receiver disabled (status bits inhibited) 1 SCI receiver enabled
`static int`	`scc1r1RIE`	Receiver Interrupt Enable. 0 SCI RDRF and OR interrupts inhibited 1 SCI RDRF and OR interrupts enabled
`static int`	`scc1r1RWU`	Receiver Wakeup. 0 normal receiver operation (received data recognized) 1 Wakeup mode enabled (received data ignored until awakened)
`static int`	`scc1r1SBK`	SCI1 control register 1 (SCC1R1) flags. 0 normal operation 1 break frame(s) transmitted after completion of current frame
`static int`	`scc1r1TCIE`	Transmit Complete Interrupt Enable. 0 SCI TC interrupts inhibited 1 SCI TC interrupts enabled
`static int`	`scc1r1TE`	Transmitter Enable. 0 SCI transmitter disabled (TXD pin can be used as I/O) 1 SCI transmitter enabled (TXD pin dedicated to SCI transmitter)
`static int`	`scc1r1TIE`	Transmit Interrupt Enable. 0 SCI TDRE interrupts inhibited 1 SCI TDRE interrupts enabled
`static int`	`scc1r1WAKE`	Wakeup by Address Mark. 0 SCI receiver awakened by idle-line detection 1 SCI receiver awakened by address mark (last bit set)
`static int`	`scc1r1WOMS`	Wired-OR Mode for SCI Pins. 0 If configured as an output, TXD is a normal CMOS output 1 If configured as an output, TXD is an open-drain output
`static int`	`scc1rILIE`	Idle-Line Interrupt Enable. 0 SCI IDLE interrupts inhibited 1 SCI IDLE interrupts enabled
`static int`	`scc2r1ILIE`	Idle-Line Interrupt Enable. 0 SCI IDLE interrupts inhibited 1 SCI IDLE interrupts enabled
`static int`	`scc2r1ILT`	Idle-Line Detect Type. 0 Short idle-line detect (start count on first one) 1 Long idle-line detect (start count on first one after stop bit(s))
`static int`	`scc2r1LOOPS`	Loop Mode. 0 normal SCI operation, no looping, feedback path disabled 1 Test SCI operation, looping, feedback path enabled
`static int`	`scc2r1M`	Mode Select.
`static int`	`scc2r1PE`	Parity Enable. 0 SCI parity disabled 1 SCI parity enabled
`static int`	`scc2r1PT`	Parity Type.
`static int`	`scc2r1RE`	Receiver Enable. 0 SCI receiver disabled (status bits inhibited) 1 SCI receiver enabled
`static int`	`scc2r1RIE`	Receiver Interrupt Enable. 0 SCI RDRF and OR interrupts inhibited 1 SCI RDRF and OR interrupts enabled
`static int`	`scc2r1RWU`	Receiver Wakeup. 0 normal receiver operation (received data recognized) 1 Wakeup mode enabled (received data ignored until awakened)
`static int`	`scc2r1SBK`	SCI1 control register 1 (scc2R1) flags. 0 normal operation 1 break frame(s) transmitted after completion of current frame
`static int`	`scc2r1TCIE`	Transmit Complete Interrupt Enable. 0 SCI TC interrupts inhibited 1 SCI TC interrupts enabled
`static int`	`scc2r1TE`	Transmitter Enable. 0 SCI transmitter disabled (TXD pin can be used as I/O) 1 SCI transmitter enabled (TXD pin dedicated to SCI transmitter)
`static int`	`scc2r1TIE`	Transmit Interrupt Enable. 0 SCI TDRE interrupts inhibited 1 SCI TDRE interrupts enabled
`static int`	`scc2r1WAKE`	Wakeup by Address Mark. 0 SCI receiver awakened by idle-line detection 1 SCI receiver awakened by address mark (last bit set)
`static int`	`scc2r1WOMS`	Wired-OR Mode for SCI Pins. 0 If configured as an output, TXD is a normal CMOS output 1 If configured as an output, TXD is an open-drain output
`static int`	`SCI_IntLevel`	SCI Interrupt level
`static int`	`SPI_IntLevel`	SPI Interrupt level

Fields inherited from interface org.deepjava.runtime.mpc555.Impc555
BAR, BBCMCR, BR0, BR1, BR2, BR3, CCW_A, CCW_B, CFSR0_A, CFSR0_B, CFSR1_A, CFSR1_B, CFSR2_A, CFSR2_B, CFSR3_A, CFSR3_B, CIER_A, CIER_B, CISR_A, CISR_B, CMFA_BaseAddr, CMFA_Size, CMFB_BaseAddr, CMFB_Size, CMFCTL_A, CMFCTL_B, CMFMCR_A, CMFMCR_B, CMFTST_A, CMFTST_B, CMPA, CMPB, CMPC, CMPD, CMPE, CMPF, CMPG, CMPH, COLIR, COMDRAM, COUNTA, COUNTB, CPR0_A, CPR0_B, CPR1_A, CPR1_B, DDRQA_A, DDRQA_B, DDRQS, DER, DMBR, DMOR, DPTMCR, DSCR_A, DSCR_B, DSSR_A, DSSR_B, ECR, EID, EIE, EMCR, excpCodeBase, excpCodeSize, FPECR, HSQR0_A, HSQR0_B, HSQR1_A, HSQR1_B, HSRR0_A, HSRR0_B, HSRR1_A, HSRR1_B, ICTRL, IMB, IMMR, L2U_GRA, L2U_MCR, L2U_RA0, L2U_RA1, L2U_RA2, L2U_RA3, L2U_RBA0, L2U_RBA1, L2U_RBA2, L2U_RBA3, LCTRL1, LCTRL2, LJSRR_A, LJSRR_B, LJURR_A, LJURR_B, MCPSMSCR, MDASM11AR, MDASM11BR, MDASM11SCR, MDASM11SCRD, MDASM12AR, MDASM12BR, MDASM12SCR, MDASM12SCRD, MDASM13AR, MDASM13BR, MDASM13SCR, MDASM13SCRD, MDASM14AR, MDASM14BR, MDASM14SCR, MDASM14SCRD, MDASM15AR, MDASM15BR, MDASM15SCR, MDASM15SCRD, MDASM27AR, MDASM27BR, MDASM27SCR, MDASM27SCRD, MDASM28AR, MDASM28BR, MDASM28SCR, MDASM28SCRD, MDASM29AR, MDASM29BR, MDASM29SCR, MDASM29SCRD, MDASM30AR, MDASM30BR, MDASM30SCR, MDASM30SCRD, MDASM31AR, MDASM31BR, MDASM31SCR, MDASM31SCRD, MI_GRA, MI_RA0, MI_RA1, MI_RA2, MI_RA3, MI_RBA0, MI_RBA1, MI_RBA2, MI_RBA3, MIOS1ER0, MIOS1ER1, MIOS1LVL0, MIOS1LVL1, MIOS1MCR, MIOS1RPR0, MIOS1RPR1, MIOS1SR0, MIOS1SR1, MIOS1TPCR, MIOS1VNR, MISCNT, MISRH, MISRL, MMCSM22CNT, MMCSM22ML, MMCSM22SCR, MMCSM22SCRD, MMCSM6CNT, MMCSM6ML, MMCSM6SCR, MMCSM6SCRD, MPIOSMDDR, MPIOSMDR, MPWMSM0CNTR, MPWMSM0PERR, MPWMSM0PULR, MPWMSM0SCR, MPWMSM16CNTR, MPWMSM16PERR, MPWMSM16PULR, MPWMSM16SCR, MPWMSM17CNTR, MPWMSM17PERR, MPWMSM17PULR, MPWMSM17SCR, MPWMSM18CNTR, MPWMSM18PERR, MPWMSM18PULR, MPWMSM18SCR, MPWMSM19CNTR, MPWMSM19PERR, MPWMSM19PULR, MPWMSM19SCR, MPWMSM1CNTR, MPWMSM1PERR, MPWMSM1PULR, MPWMSM1SCR, MPWMSM2CNTR, MPWMSM2PERR, MPWMSM2PULR, MPWMSM2SCR, MPWMSM3CNTR, MPWMSM3PERR, MPWMSM3PULR, MPWMSM3SCR, MSTAT, NRI, OR0, OR1, OR2, OR3, PDMCR, PISCR, PISCRIK, PITC, PITCK, PITR, PLPRCR, PLPRCRK, PORTQA_A, PORTQA_B, PORTQB_A, PORTQB_B, PORTQS, PQSPAR, PVR, QACR0_A, QACR0_B, QACR1_A, QACR1_B, QACR2_A, QACR2_B, QADC64INT_A, QADC64INT_B, QADC64MCR_A, QADC64MCR_B, QASR0_A, QASR0_B, QASR1_A, QASR1_B, QDSCI_IL, QSCI1CR, QSCI1SR, QSMCMMCR, QSPI_IL, RAMBAR, RECRAM, RJURR_A, RJURR_B, RSR, RSRK, RTC, RTCAL, RTCALK, RTCK, RTCSC, RTCSCK, RTSEC, RTSECK, SC1DR, SC1SR, SC2DR, SC2SR, SCC1R0, SCC1R1, SCC2R0, SCC2R1, SCCR, SCCRK, SCRQ, SCTQ, SGPIOCR, SGPIODT1, SGPIODT2, SIEL, SIMASK, SIPEND, SIUMCR, SIVEC, SPCR0, SPCR1, SPCR2, SPCR3, SPR1022, SPR144, SPR145, SPR146, SPR147, SPR148, SPR149, SPR150, SPR151, SPR152, SPR153, SPR154, SPR155, SPR156, SPR157, SPR158, SPR159, SPR528, SPR536, SPR560, SPR568, SPR638, SPR784, SPR785, SPR786, SPR787, SPR792, SPR793, SPR794, SPR795, SPR80, SPR81, SPR816, SPR817, SPR818, SPR819, SPR82, SPR824, SPR825, SPR826, SPR827, SPSR, SRAMA_BaseAddr, SRAMA_Size, SRAMB_BaseAddr, SRAMB_Size, SRAMMCR_A, SRAMMCR_B, stackSize, SWSR, SYPCR, sysTabBaseAddr, TBK, TBREF0, TBREF0K, TBREF1, TBREF1K, TBSCR, TBSCRK, TESR, TICR_A, TICR_B, TPUMCR_A, TPUMCR_B, TPUMCR2_A, TPUMCR2_B, TPUMCR3_A, TPUMCR3_B, TPURAM0_A, TPURAM0_B, TPURAM1_A, TPURAM1_B, TPURAM10_A, TPURAM10_B, TPURAM11_A, TPURAM11_B, TPURAM12_A, TPURAM12_B, TPURAM13_A, TPURAM13_B, TPURAM14_A, TPURAM14_B, TPURAM15_A, TPURAM15_B, TPURAM2_A, TPURAM2_B, TPURAM3_A, TPURAM3_B, TPURAM4_A, TPURAM4_B, TPURAM5_A, TPURAM5_B, TPURAM6_A, TPURAM6_B, TPURAM7_A, TPURAM7_B, TPURAM8_A, TPURAM8_B, TPURAM9_A, TPURAM9_B, TRANRAM, UIPEND, UMCR, UTSTCREG, VSRMCR

Fields inherited from interface org.deepjava.runtime.mpc555.IntbMpc555HB
dualMappedSize, extFlashBase, extFlashSize, extRamBase, extRamSize, heapSize, SRR1init

Fields inherited from interface org.deepjava.runtime.ppc32.Ippc32
CR, CTR, DAR, DEC, DSISR, FPR0, FPR1, FPR10, FPR11, FPR12, FPR13, FPR14, FPR15, FPR16, FPR17, FPR18, FPR19, FPR2, FPR20, FPR21, FPR22, FPR23, FPR24, FPR25, FPR26, FPR27, FPR28, FPR29, FPR3, FPR30, FPR31, FPR4, FPR5, FPR6, FPR7, FPR8, FPR9, FPSCR, LR, MSR, R0, R1, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R2, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R3, R30, R31, R4, R5, R6, R7, R8, R9, SPR1, SPR18, SPR19, SPR22, SPR26, SPR268, SPR269, SPR27, SPR272, SPR273, SPR274, SPR275, SPR287, SPR8, SPR9, SPRG0, SPRG1, SPRG2, SPRG3, SRR0, SRR1, TBLread, TBUread, XER

Constructor Summary

Constructors
Constructor Description

QSMCM()

Method Summary

All Methods Static Methods Concrete Methods
Modifier and Type Method Description

static void init()
Call this method to initialize the interrupt levels if you use SPI or SCI interrupts.
- Methods inherited from class java.lang.Object
  equals, getClass, hashCode, toString

- Field Detail
  - SCI_IntLevel
```
public static final int SCI_IntLevel
```
    SCI Interrupt level
    
    See Also:
    
    Constant Field Values
  - SPI_IntLevel
```
public static final int SPI_IntLevel
```
    SPI Interrupt level
    
    See Also:
    
    Constant Field Values
  - scc1r1SBK
```
public static final int scc1r1SBK
```
    SCI1 control register 1 (SCC1R1) flags.
    0 normal operation
    1 break frame(s) transmitted after completion of current frame
    
    See Also:
    
    Constant Field Values
  - scc1r1RWU
```
public static final int scc1r1RWU
```
    Receiver Wakeup.
    0 normal receiver operation (received data recognized)
    1 Wakeup mode enabled (received data ignored until awakened)
    
    See Also:
    
    Constant Field Values
  - scc1r1RE
```
public static final int scc1r1RE
```
    Receiver Enable.
    0 SCI receiver disabled (status bits inhibited)
    1 SCI receiver enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1TE
```
public static final int scc1r1TE
```
    Transmitter Enable.
    0 SCI transmitter disabled (TXD pin can be used as I/O)
    1 SCI transmitter enabled (TXD pin dedicated to SCI transmitter)
    
    See Also:
    
    Constant Field Values
  - scc1rILIE
```
public static final int scc1rILIE
```
    Idle-Line Interrupt Enable.
    0 SCI IDLE interrupts inhibited
    1 SCI IDLE interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1RIE
```
public static final int scc1r1RIE
```
    Receiver Interrupt Enable.
    0 SCI RDRF and OR interrupts inhibited
    1 SCI RDRF and OR interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1TCIE
```
public static final int scc1r1TCIE
```
    Transmit Complete Interrupt Enable.
    0 SCI TC interrupts inhibited
    1 SCI TC interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1TIE
```
public static final int scc1r1TIE
```
    Transmit Interrupt Enable.
    0 SCI TDRE interrupts inhibited
    1 SCI TDRE interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1WAKE
```
public static final int scc1r1WAKE
```
    Wakeup by Address Mark.
    0 SCI receiver awakened by idle-line detection
    1 SCI receiver awakened by address mark (last bit set)
    
    See Also:
    
    Constant Field Values
  - scc1r1M
```
public static final int scc1r1M
```
    Mode Select.
    0 10-bit SCI frame
    1 11-bit SCI frame
    
    See Also:
    
    Constant Field Values
  - scc1r1PE
```
public static final int scc1r1PE
```
    Parity Enable.
    0 SCI parity disabled
    1 SCI parity enabled
    
    See Also:
    
    Constant Field Values
  - scc1r1PT
```
public static final int scc1r1PT
```
    Parity Type.
    0 even parity
    1 odd parity
    
    See Also:
    
    Constant Field Values
  - scc1r1ILT
```
public static final int scc1r1ILT
```
    Idle-Line Detect Type.
    0 Short idle-line detect (start count on first one)
    1 Long idle-line detect (start count on first one after stop bit(s))
    
    See Also:
    
    Constant Field Values
  - scc1r1WOMS
```
public static final int scc1r1WOMS
```
    Wired-OR Mode for SCI Pins.
    0 If configured as an output, TXD is a normal CMOS output
    1 If configured as an output, TXD is an open-drain output
    
    See Also:
    
    Constant Field Values
  - scc1r1LOOPS
```
public static final int scc1r1LOOPS
```
    Loop Mode.
    0 normal SCI operation, no looping, feedback path disabled
    1 Test SCI operation, looping, feedback path enabled
    
    See Also:
    
    Constant Field Values
  - sc1srPF
```
public static final int sc1srPF
```
    Parity Error.
    0 No parity error on the received data
    1 Parity error ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc1srFE
```
public static final int sc1srFE
```
    Framing Error.
    0 No framing error on the received data
    1 Framing error or break ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc1srNF
```
public static final int sc1srNF
```
    Noise Error Flag.
    0 No noise detectedon the received data
    1 Noise ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc1srOR
```
public static final int sc1srOR
```
    Overrun Error.
    0 RDRF is cleare before new data arrives
    1 RDRF is not cleare before new data arrives
    
    See Also:
    
    Constant Field Values
  - sc1srIDLE
```
public static final int sc1srIDLE
```
    Idle-Line detected.
    0 SCI receiver did not detect an idle-line condition
    1 SCI receiver detected an idle-line condition
    
    See Also:
    
    Constant Field Values
  - sc1srRAF
```
public static final int sc1srRAF
```
    Receiver Active.
    0 SCI receiver is idle
    1 SCI receiver is busy
    
    See Also:
    
    Constant Field Values
  - sc1srRDRF
```
public static final int sc1srRDRF
```
    Receiver Data Register Full.
    0 Register RDR is empty or contains previously read data
    1 Register RDR contains new data
    
    See Also:
    
    Constant Field Values
  - sc1srTC
```
public static final int sc1srTC
```
    Transmit Complete.
    0 SCI transmitter is busy
    1 SCI transmitter is idle
    
    See Also:
    
    Constant Field Values
  - sc1srTDRE
```
public static final int sc1srTDRE
```
    Transmit Data Register Empty.
    0 Register TDR still contains data to be sent to the transmit serial shifter
    1 A new character can now be written to register TDR
    
    See Also:
    
    Constant Field Values
  - scc2r1SBK
```
public static final int scc2r1SBK
```
    SCI1 control register 1 (scc2R1) flags.
    0 normal operation
    1 break frame(s) transmitted after completion of current frame
    
    See Also:
    
    Constant Field Values
  - scc2r1RWU
```
public static final int scc2r1RWU
```
    Receiver Wakeup.
    0 normal receiver operation (received data recognized)
    1 Wakeup mode enabled (received data ignored until awakened)
    
    See Also:
    
    Constant Field Values
  - scc2r1RE
```
public static final int scc2r1RE
```
    Receiver Enable.
    0 SCI receiver disabled (status bits inhibited)
    1 SCI receiver enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1TE
```
public static final int scc2r1TE
```
    Transmitter Enable.
    0 SCI transmitter disabled (TXD pin can be used as I/O)
    1 SCI transmitter enabled (TXD pin dedicated to SCI transmitter)
    
    See Also:
    
    Constant Field Values
  - scc2r1ILIE
```
public static final int scc2r1ILIE
```
    Idle-Line Interrupt Enable.
    0 SCI IDLE interrupts inhibited
    1 SCI IDLE interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1RIE
```
public static final int scc2r1RIE
```
    Receiver Interrupt Enable.
    0 SCI RDRF and OR interrupts inhibited
    1 SCI RDRF and OR interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1TCIE
```
public static final int scc2r1TCIE
```
    Transmit Complete Interrupt Enable.
    0 SCI TC interrupts inhibited
    1 SCI TC interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1TIE
```
public static final int scc2r1TIE
```
    Transmit Interrupt Enable.
    0 SCI TDRE interrupts inhibited
    1 SCI TDRE interrupts enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1WAKE
```
public static final int scc2r1WAKE
```
    Wakeup by Address Mark.
    0 SCI receiver awakened by idle-line detection
    1 SCI receiver awakened by address mark (last bit set)
    
    See Also:
    
    Constant Field Values
  - scc2r1M
```
public static final int scc2r1M
```
    Mode Select.
    0 10-bit SCI frame
    1 11-bit SCI frame
    
    See Also:
    
    Constant Field Values
  - scc2r1PE
```
public static final int scc2r1PE
```
    Parity Enable.
    0 SCI parity disabled
    1 SCI parity enabled
    
    See Also:
    
    Constant Field Values
  - scc2r1PT
```
public static final int scc2r1PT
```
    Parity Type.
    0 even parity
    1 odd parity
    
    See Also:
    
    Constant Field Values
  - scc2r1ILT
```
public static final int scc2r1ILT
```
    Idle-Line Detect Type.
    0 Short idle-line detect (start count on first one)
    1 Long idle-line detect (start count on first one after stop bit(s))
    
    See Also:
    
    Constant Field Values
  - scc2r1WOMS
```
public static final int scc2r1WOMS
```
    Wired-OR Mode for SCI Pins.
    0 If configured as an output, TXD is a normal CMOS output
    1 If configured as an output, TXD is an open-drain output
    
    See Also:
    
    Constant Field Values
  - scc2r1LOOPS
```
public static final int scc2r1LOOPS
```
    Loop Mode.
    0 normal SCI operation, no looping, feedback path disabled
    1 Test SCI operation, looping, feedback path enabled
    
    See Also:
    
    Constant Field Values
  - sc2srPF
```
public static final int sc2srPF
```
    Parity Error.
    0 No parity error on the received data
    1 Parity error ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc2srFE
```
public static final int sc2srFE
```
    Framing Error.
    0 No framing error on the received data
    1 Framing error or break ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc2srNF
```
public static final int sc2srNF
```
    Noise Error Flag.
    0 No noise detectedon the received data
    1 Noise ocured on the received data
    
    See Also:
    
    Constant Field Values
  - sc2srOR
```
public static final int sc2srOR
```
    Overrun Error.
    0 RDRF is cleare before new data arrives
    1 RDRF is not cleare before new data arrives
    
    See Also:
    
    Constant Field Values
  - sc2srIDLE
```
public static final int sc2srIDLE
```
    Idle-Line detected.
    0 SCI receiver did not detect an idle-line condition
    1 SCI receiver detected an idle-line condition
    
    See Also:
    
    Constant Field Values
  - sc2srRAF
```
public static final int sc2srRAF
```
    Receiver Active.
    0 SCI receiver is idle
    1 SCI receiver is busy
    
    See Also:
    
    Constant Field Values
  - sc2srRDRF
```
public static final int sc2srRDRF
```
    Receiver Data Register Full.
    0 Register RDR is empty or contains previously read data
    1 Register RDR contains new data
    
    See Also:
    
    Constant Field Values
  - sc2srTC
```
public static final int sc2srTC
```
    Transmit Complete.
    0 SCI transmitter is busy
    1 SCI transmitter is idle
    
    See Also:
    
    Constant Field Values
  - sc2srTDRE
```
public static final int sc2srTDRE
```
    Transmit Data Register Empty.
    0 Register TDR still contains data to be sent to the transmit serial shifter
    1 A new character can now be written to register TDR
    
    See Also:
    
    Constant Field Values
- Constructor Detail
  - QSMCM
```
public QSMCM()
```
- Method Detail
  - init
```
public static void init()
```
    Call this method to initialize the interrupt levels if you use SPI or SCI interrupts.

Class QSMCM

Field Summary

Fields inherited from interface org.deepjava.runtime.mpc555.Impc555

Fields inherited from interface org.deepjava.runtime.mpc555.IntbMpc555HB

Fields inherited from interface org.deepjava.runtime.ppc32.Ippc32

Constructor Summary

Method Summary

Methods inherited from class java.lang.Object

Field Detail

SCI_IntLevel

SPI_IntLevel

scc1r1SBK

scc1r1RWU

scc1r1RE

scc1r1TE

scc1rILIE

scc1r1RIE

scc1r1TCIE

scc1r1TIE

scc1r1WAKE

scc1r1M

scc1r1PE

scc1r1PT

scc1r1ILT

scc1r1WOMS

scc1r1LOOPS

sc1srPF

sc1srFE

sc1srNF

sc1srOR

sc1srIDLE

sc1srRAF

sc1srRDRF

sc1srTC

sc1srTDRE

scc2r1SBK

scc2r1RWU

scc2r1RE

scc2r1TE

scc2r1ILIE

scc2r1RIE

scc2r1TCIE

scc2r1TIE

scc2r1WAKE

scc2r1M

scc2r1PE

scc2r1PT

scc2r1ILT

scc2r1WOMS

scc2r1LOOPS

sc2srPF

sc2srFE

sc2srNF

sc2srOR

sc2srIDLE

sc2srRAF

sc2srRDRF

sc2srTC

sc2srTDRE

Constructor Detail

QSMCM

Method Detail

init