Class VL53L0X
- java.lang.Object
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- org.deepjava.runtime.arm32.ARMException
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- org.deepjava.runtime.zynq7000.IrqInterrupt
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- org.deepjava.runtime.zynq7000.driver.VL53L0X
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public class VL53L0X extends IrqInterrupt implements Izynq7000
Interrupt controlled driver for the VL53L0X TOF Sensor with the SPI1 of the Zynq7000.
Remember:
The driver runs with a loop time of 1ms. The SPI interface is only accessible through the following pins:- MOSI: MIO 10
- MISO: MIO 11
- CLK : MIO 12
- CS : MIO 13
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Field Summary
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Fields inherited from class org.deepjava.runtime.zynq7000.IrqInterrupt
nofIRQ, nofUnexpInterrupts
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Fields inherited from interface org.deepjava.runtime.arm32.Iarm32
ACTLR, CPACR, CPSR, D0, D1, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D2, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D3, D30, D31, D4, D5, D6, D7, D8, D9, FPSCR, ID_ISAR0, ID_ISAR1, ID_ISAR2, ID_ISAR3, LR, LR_ABT, LR_FIQ, LR_IRQ, LR_MON, LR_SVC, LR_UND, LR_USR, MIDR, MPIDR, MPUIR, PC, R0, R1, R10, R10_FIQ, R11, R11_FIQ, R12, R12_FIQ, R2, R3, R4, R5, R6, R7, R8, R8_FIQ, R9, R9_FIQ, S0, S1, S10, S11, S12, S13, S14, S15, S16, S17, S18, S19, S2, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S3, S30, S31, S4, S5, S6, S7, S8, S9, SCTLR, SP, SP_ABT, SP_FIQ, SP_IRQ, SP_MON, SP_SVC, SP_UND, SP_USR, SPSR_ABT, SPSR_FIQ, SPSR_IRQ, SPSR_MON, SPSR_SVC, SPSR_UND
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Fields inherited from interface org.deepjava.runtime.zynq7000.Izynq7000
APER_CLK_CTRL, ARM_CLK_CTRL, ARM_PLL_CFG, ARM_PLL_CTRL, AXI_PRIO_RD_PORT0, AXI_PRIO_RD_PORT1, AXI_PRIO_RD_PORT2, AXI_PRIO_RD_PORT3, AXI_PRIO_WR_PORT0, AXI_PRIO_WR_PORT1, AXI_PRIO_WR_PORT2, AXI_PRIO_WR_PORT3, BOOT_MODE, CAN_RST_CTRL, CHE_CORR_ECC_LOG, CHE_ECC_CONTROL, CHE_ECC_STATS, CHE_REFRESH_TIMER01, CHE_T_ZQ, CHE_T_ZQ_SHORT, CHE_UNCORR_ECC_LOG, CLK_621_TRUE, CPU_RST_CTRL, cpuPrivateReg, CTRL_REG1, CTRL_REG2, CTRL_REG3, CTRL_REG4, CTRL_REG5, CTRL_REG6, DBG_CLK_CTRL, DCI_CLK_CTRL, DDR_CLK_CTRL, DDR_PLL_CFG, DDR_PLL_CTRL, DDR_RST_CTRL, DDRC_CTRL, DDRIOB_ADDR0, DDRIOB_ADDR1, DDRIOB_CLOCK, DDRIOB_DATA0, DDRIOB_DATA1, DDRIOB_DCI_CTRL, DDRIOB_DCI_STATUS, DDRIOB_DDR_CTRL, DDRIOB_DIFF0, DDRIOB_DIFF1, DDRIOB_DRIVE_SLEW_ADDR, DDRIOB_DRIVE_SLEW_CLOCK, DDRIOB_DRIVE_SLEW_DATA, DDRIOB_DRIVE_SLEW_DIFF, ddrReg, DEEP_PWRDWN, DFI_TIMING, DLL_CALIB, DRAM_ADR_MAP_BANK, DRAM_ADR_MAP_COL, DRAM_ADR_MAP_ROW, DRAM_BURST8_RDRW, DRAM_DISABLE_DQ, DRAM_EMR, DRAM_EMR_MR, DRAM_INIT_PARAM, DRAM_ODT, DRAM_PARAM0, DRAM_PARAM1, DRAM_PARAM2, DRAM_PARAM3, DRAM_PARAM4, ECC_SCRUB, excpCodeBase, excpCodeSize, FPGA_RST_CTRL, FPGA0_CLK_CTRL, FPGA1_CLK_CTRL, FPGA2_CLK_CTRL, FPGA3_CLK_CTRL, globalTimer, GPIO_DIR0, GPIO_DIR1, GPIO_IN0, GPIO_IN1, GPIO_MASK_LSW0, GPIO_MASK_LSW1, GPIO_MASK_MSW0, GPIO_MASK_MSW1, GPIO_OUT_EN0, GPIO_OUT_EN1, GPIO_OUT0, GPIO_OUT1, GPIO_RST_CTRL, GPIOB_CTRL, gpioController, GTCR, GTCR_L, GTCR_U, heapSize, HPR, I2C_RST_CTRL, ICCBPR, ICCEOIR, ICCIAR, ICCICR, ICCIDR, ICCPMR, ICDDCR, ICDICER0, ICDICER1, ICDICER2, ICDICFR0, ICDICFR1, ICDICFR2, ICDICFR3, ICDICFR4, ICDICFR5, ICDICTR, ICDIIDR, ICDIPR0, ICDIPR1, ICDIPR20, ICDIPTR0, ICDIPTR1, ICDIPTR2, ICDIPTR20, ICDISER0, ICDISER1, ICDISER2, interruptCtlr, interruptCtlrDistr, IO_PLL_CFG, IO_PLL_CTRL, ioReg, LPDDR_CTRL0, LPDDR_CTRL1, LPDDR_CTRL2, LPDDR_CTRL3, LPR, LQSPI_CLK_CTRL, LQSPI_RST_CTRL, LVL_SHFTR_EN, MIO_PIN_00, MIO_PIN_01, MIO_PIN_07, MIO_PIN_09, MIO_PIN_10, MIO_PIN_11, MIO_PIN_12, MIO_PIN_13, MIO_PIN_14, MIO_PIN_15, MIO_PIN_47, MIO_PIN_48, MIO_PIN_49, MIO_PIN_51, MODE_STS, OCM_BaseAddr, OCM_CFG, OCM_RST_CTRL, OCM_Size, ODT_DELAY_HOLD, PAGE_MASK, PCAP_CLK_CTRL, PHY_CMD_TIMEOUT, PHY_CONFIG0, PHY_CONFIG1, PHY_CONFIG2, PHY_CONFIG3, PHY_DBG, PHY_INIT_RATIO0, PHY_INIT_RATIO1, PHY_INIT_RATIO2, PHY_INIT_RATIO3, PHY_RCVR_ENABLE, PHY_RD_DQS_CFG0, PHY_RD_DQS_CFG1, PHY_RD_DQS_CFG2, PHY_RD_DQS_CFG3, PHY_WE_CFG0, PHY_WE_CFG1, PHY_WE_CFG2, PHY_WE_CFG3, PHY_WR_DQS_CFG0, PHY_WR_DQS_CFG1, PHY_WR_DQS_CFG2, PHY_WR_DQS_CFG3, PLL_STATUS, privateTimer, PSS_RST_CTRL, PTCOUNT, PTCR, PTISR, PTLR, REBOOT_STATUS, REG_2C, REG_2D, REG_64, REG_65, RS_AWDT_CTRL, SDIO_RST_CTRL, SLCR_LOCK, SLCR_LOCKSTA, SLCR_UNLOCK, slcrReg, SMC_RST_CTRL, SPI_CLK_CTRL, SPI_RST_CTRL, SPI1_CR, SPI1_ER, SPI1_IDR, SPI1_IER, SPI1_RXD, SPI1_SR, SPI1_TXD, spiController, stackSizeIRQ, stackSizeSVC, sysTabBaseAddr, TOPSW_CLK_CTRL, TWO_RANK_CFG, UART_CLK_CTRL, UART_RST_CTRL, UART0_BAUDDIV, UART0_BAUDGEN, UART0_CR, UART0_FIFO, UART0_FLOWDELAY, UART0_IDR, UART0_IER, UART0_IMR, UART0_ISR, UART0_MODEMCR, UART0_MODEMSR, UART0_MR, UART0_RX_FIFO_LEVEL, UART0_RXTOUT, UART0_SR, UART0_TX_FIFO_LEVEL, UART1_BAUDDIV, UART1_BAUDGEN, UART1_CR, UART1_FIFO, UART1_FLOWDELAY, UART1_IDR, UART1_IER, UART1_IMR, UART1_ISR, UART1_MODEMCR, UART1_MODEMSR, UART1_MR, UART1_RX_FIFO_LEVEL, UART1_RXTOUT, UART1_SR, UART1_TX_FIFO_LEVEL, uartController, WR, WR_DATA_SLV0, WR_DATA_SLV1, WR_DATA_SLV2, WR_DATA_SLV3
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Constructor Summary
Constructors Constructor Description VL53L0X(int sensors)
Initialize up to 4 VL53L0X time of flight sensors
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Method Summary
All Methods Instance Methods Concrete Methods Modifier and Type Method Description void
action()
Task function handling the general state and operations of this driver Not to be called manually!int[]
read()
Read last measurement data-
Methods inherited from class org.deepjava.runtime.zynq7000.IrqInterrupt
install
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Method Detail
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action
public void action()
Task function handling the general state and operations of this driver Not to be called manually!- Overrides:
action
in classIrqInterrupt
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read
public int[] read()
Read last measurement data- Returns:
- distances in mm, the returned array has as many elements as sensors were requested in the constructor
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